The authors explore peculiarities of using of codes with summation of weight- ed data bits in organization of technical diagnosis systems. The article provides with a brief overview in the area of using of classical codes and weighted codes with summation for solving the tasks of digital systems technical diagnostics. The classification of codes with summation is given. The error detection characteris- tics in data vectors by weighted codes with summation are particularly analyzed by types (unidirectional, symmetrical and asymmetrical) and multiplicities. It is proved that weighted codes with summation, for which the operation of residue by previously fixed modulo is not used in formation, have the ability to identify any unidirectional distortions in data vectors. In addition, it is proved that weighted codes with summation can not have the uniform distribution of data vectors among check vectors, it means impossible to construct a weighted code with summation with a theoretical minimum of the total number of undetectable errors. An article presents a method of implementation of weighted codes with summation gene- rators based on the use of standard circuits of half-adder and adders. Examples of implementation of weighted code generators on multiplexers and programmable logic devices of CPLD class are given. Experimental researches of the weighed codes with summation on the organization of concurrent error detection systems based on them were conducted. The error detection properties of error detection at the outputs of check circuits are analyzed, as well as the characteristics of the complexity of the technical implementation of concurrent error detection systems. The advantages and disadvantages of using of weighted codes with summation, which are manifested in the organization of concurrent error detection systems, are considered.