Russian Federation
Russian Federation
Russian Federation
UDK 004.021 Алгоритмы
Purpose: To develop a method for increasing the speed of CRC computation for programmable logic integrated circuits (PLICs) that exceeds the speed of the direct computation method by cyclic shift. Methods: Computer simulation has been used for experimental studies. The analytical review method and the theory of noise protection coding have been used for theoretical studies. Results: A CRC calculation method for constant length messages using arbitrary polynomials is proposed and described. Control digit codes with minimum redundancy and cyclic redundant codes have been compared and the results are presented. Practical significance: The method described allows for a qualitatively faster CRC calculation based on FPGAs than those previously used. A method for accelerating the calculation of cyclic redundancy code for arbitrary polynomials has been developed provided that the message length is fixed.
Anti-jamming coding, cyclic redundancy code, FPGA, code distance, separable codes
1. Prohorova G. M. Oborudovanie stancii ustroystvami mikroprocessornoy centralizacii EC-EM s uvyazkoy s sistemoy diagnostirovaniya i monitoringa (ADK-SCB) / G. M. Prohorova // Forum molodyh uchenyh. — 2017. — № 6(10).
2. Kalinin T. S. Spektral'no-signaturnaya diagnostika mikroprocessornyh informacionno-upravlyayuschih sistem zheleznodorozhnoy avtomatiki i telemehaniki / T. S. Kalinin // IVD. — 2012. — № 1.
3. Feduhin A. V. PLIS-sistemy kak sredstvo povysheniya otkazoustoychivosti / A. V. Feduhin, A. A. Muha // MMS. — 2010. — № 1. — URL: https://cyberleninka.ru/article/n/plis-sistemy-kak-sredstvo-povysheniya-otkazoustoychivosti.
4. Tarasov I. Proektirovanie konfiguriruemyh processorov na baze PLIS / I. Tarasov // Komponenty i Tehnologii. — 2006. — № 57. — URL: https://cyberleninka.ru/article/n/proektirovanie-konfiguriruemyh-protsessorov-na-baze-plis-1.
5. Berlekamp E. R. A Construction for Partitions Which Avoid Long Arithmetic Progressions / E. R. Berlekamp // Canadian Mathematical Bulletin. — 1968. — Vol. 11. — Iss. 3. — Pp. 409–414. — DOI:https://doi.org/10.4153/CMB-1968-047-7.
6. Hamming R.W. Error detecting and error correcting codes / R.W. Hamming // The Bell System Technical Journal. — 1950. — Vol. 29. — Iss. 2. — DOI:https://doi.org/10.1002/j.1538-7305.1950.tb00463.x.
7. Sridevi N. Implementation of Error Correction Techniques in Memory Applications / N. Sridevi, K. Jamal, K. Mannem // 2021 5th International Conference on Computing Methodologies and Communication. — April 08–10 2021. — DOI:https://doi.org/10.1109/ICCMC51019.2021.9418432.
8. Blyudov A. A. Raspredelenie moschnosti kodov s naimen'shey izbytochnost'yu alfavitov v zavisimosti ot kolichestva bit i kodovogo rasstoyaniya / A. A. Blyudov, D. V. Pivovarov, G. Yu. Pronin // Izvestiya Peterburgskogo universiteta putey soobscheniya. — 2023. — № 2. — URL: https://cyberleninka.ru/article/n/raspredelenie-moschnostikodov- s-naimenshey-izbytochnostyu-alfavitov-v-zavisimosti- ot-kolichestva-bit-i-kodovogo-rasstoyaniya.
9. Shahariar Parvez A. H. M. Design and implementation of hamming encoder and decoder over FPGA / A. H. M. Shahariar Parvez et al. // International Conference on Computer Networks and Communication Technologies: ICCNCT 2018. — Springer Singapore, 2019. — Pp. 1005–1022.
10. Panem C. Polynomials in Error Detection and Correction in Data Communication System / C. Panem, V. Gad, R. Gad // Coding Theory. — 2019. — P. 29.
